Memory cells configuring a typical semiconductor memory store data corresponding to the amount of charge stored in the charge trap layer. In one exemplary implementation, the charge trap layer comprises a nitride film and electrons are stored in isolated traps. One example of such configuration is disclosed in Jae Sung Sim et al., “Self Aligned Trap-Shallow Trench Isolation Scheme for the Reliability of TANOS (TaN/AlO/SiN/Oxide/Si) NAND Flash Memory”, Non-Volatile Semiconductor Memory Workshop (USA), 2007 22nd IEEE, 26-30 Aug. 2007, p 110-111. In FIG. 3 of Jae et al., a tunnel insulating film (SiO2), a charge trap layer (SiN: charge storing layer), and a block film (Al2O3) are formed in listed sequence over the silicon (Si) substrate and a gate electrode comprising a tantal nitride (TaN), tungsten (W) and tungsten nitride (WN) laminated in listed sequence is formed further on top. Between the neighboring charge trap layers and at both sides of the charge trap layer, an element isolation insulating film configured as an SAT-STI (Self Aligned Trap-Shallow Trench Isolation) is formed. The block film (Al2O3) is formed across the upper surface on charge trap layer and the element isolation insulating film.
In case the block film contains organic material and the block film is thermally treated in the back end process, carbon atoms contained in the organic material is introduced into the active area through the element isolation insulating film to be stored as a fixed charge. Fixed charge within the active area causes increased variation in threshold voltage and provides grounds for reverse narrow channel effect especially at the corners of the channel areas to deteriorate device properties.